p11 Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems

Abstract
This paper presents a software based approach for automatic generation of digital
circuitry for synthesis and incorporation in a mixed-signal circuit or system to provide Built-In Self-Test (BIST) and measurement of the analog circuitry

1. Introduction
2. Background
The DDS-based TPG consists of three numerically controlled oscillators (NCOs) and
utilizes the existing digital-to-analog converter (DAC) from the mixed-signal system to
complete the DDS.

(page 3)

When performing frequency response measurements, the top branch of MUX1 and MUX2
in Fig. 1 is activated and the DUT is driven by an in-phase signal with a frequency of f1

3. Generation of Hardware Description
Commonly in hardware description languages, many elements of a design can be
parameterized to reduce the need to redevelop a hardware model after a minor design
change to an existing, proven design

To alleviate the problems associated with both of these common solutions, a different
approach needs to be considered.

Once the program has interpreted any user parameters into the appropriate hardware
design decisions, the results can be saved as flags in the program with each flag
corresponding to a user input design choice

(page 4)
The mixed-signal BIST described above has many applications, but the components
which comprise the hardware model remain relatively similar

This approach has other benefits beyond simplifying the design process and
improving the uniformity and legibility of any generated hardware description

Once the program has interpreted any user parameters into the appropriate hardware
design decisions, the results can be saved as flags in the program with each flag
corresponding to a user input design choice

At this point we have properly formatted files containing the desired hardware
description and constraint information

(p4)
4. Device and Parameter Selection and Program Interface
Most hardware models have some level of parameterization and the presented mixedsignal
BIST design is no exception.

The mixed-signal BIST model can be separated into NCOs, digital multiplexers, adder units, multipliers, and accumulators for the TPG and ORA as show in Fig 1. Additional components can be added to allow for automated testing and recording of the results.